Description

WS3112 is a fast PCI based DSP-board, specially designed for low cost evaluation, prototyping and OEM applications. The PCI board uses the new Analog Device ADSP-2106x SHARC Signal Processor. Two onboard SHARC DSPs can perform a peak rate of 240 MFLOPs. The board has a PCI compliant Master/Slave interface. In master mode the WS3112 can be the owner of PCI resources, such as global memory (DRAM)

Prototyping and customizing for special applications requires an inexpensive board with high functionality. Wiese Signalverarbeitung uses an open interface called the SHARC IO-Pack. This interface is easy to handle but provides the user with the full SHARC functionality. Each SHARC can be augmented with its own mezzanine board, with the possibility to use the SHARC -LINK, -SIO, -IRQ and -FLAG lines. Also memory mapped SHARC Devices (if you want with DMA facilities) can be utilized with no or a little overhead.

The WS3112 confirms to the 2.1 PCI Specification. The board can hold up to 1,5 MByte static RAM and all the necessities used to debug the board with the EZ-ICE Debugger from Analog Devices.

All local bus devices are transparent to both the SHARCs and the PCI host, e.g. SHARC internal register and memory spaces are transparent to the PCI host. The same mechanism is used for the SHARC IO-Pack. The WS3112 itself can be mapped to any portion of the 4 Gbyte PCI address space. Multiply WS3112 boards can be used in parallel.

Wiese Signalverarbeitung supports the WS3112 with a sophisticated object oriented class library, the WS3112-DDL, and we recommend its usage. This device driver library (DDL is available as a linkable object library, or as a callable device driver) enables one to program the SHARCs directly, without worrying about petty IO-handling details. The DDL supports both master and slave functionality and is available for DOS, Windows and Windows NT applications. Applications with more than one DSP board will supported by the DDL too

Key Benefits

  • PCI Spec. 2.1 compatible
  • PCI « » SHARC Master / Slave operations
  • PCI « » SHARC DMA Operations in Master and Slave Mode
  • PCI « » SHARC chaining DMA Operations in Master and Slave Mode
  • Bidirectional Bursting
  • Broadcasting (SHARC » SHARC, PCI » SHARC)
  • Doorbell Register for bi-directional Interrupt handling
  • Message Passing over SHARC- and/or PCI-Bridge Register